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features ? 3.0v to 5.5v operating range ? advanced low-voltage electrically-erasable programmable logic device ? user-controlled power-down pin option ? pin-controlled standby power (10a typical) ? well-suited for battery powered systems ? 10ns maximum propagation delay ? cmos and ttl compatible inputs and outputs ? latch feature hold inputs to previous logic states ? advanced electrically-erasable technology ? reprogrammable ? 100% tested ? high-reliability cmos process ? 20 year data retention ? 100 erase/write cycles ? 2,000v esd protection ? 200ma latchup immunity ? industrial temperature ranges ? dual-in-line and surface mount packages in standard pinouts ? inputs are 5v tolerant ? green package options (pb/halide-free/rohs compliant) available ? applcations include glue logic for 3.3v systems, dma control, state machine control, graphics processing 1. description the atmel ? atf22lv10c is a high-performance cmos (electrically erasable) pro- grammable logic device (pld) that utilizes the atmel proven electrically erasable flash memory technology. speeds down to 10ns and power dissipation as low as 10ma are offered. all speed ranges are specified over the 3.0v to 5.5v range for industrial and commercial temperature ranges. the atf22lv10c provides a low-voltage and user controlled ?zero? power cmos pld solution. a user-controlled power-down feature offers ?zero? (10 a typical) standby power. this feature allows the user to manage total system power to meet specific application requirements and enhance reliability, all without sacrificing speed. (the atmel atf22lv10cqz provides edge-sensing ?zero? standby power (3 a typi- cal), as well as low voltage operation. see the atf22lv10cqz datasheet.) the atf22lv10c is capable of operating at supply voltages down to 3.0v. when the power-down pin is active, the device is placed into a zero standby power-down mode. when the power-down pin is not used or active, the device operates in a full power low voltage mode. pin ?keeper? circuits on input and output pins hold pins to their pre- vious logic levels when idle, which eliminate static power consumed by pull-up resistors. the atf22lv10c macrocell incorporates a variable product term architecture. each output is allocated from 8 to 16 product terms which allows highly-complex logic func- tions to be realized. two additional product terms are included to provide synchronous reset and asynchronous reset. these additional product terms are common to all ten registers and are automatically cleared upon power-up. register preload simplifies testing. a security fuse prevents unauthorized copying of programmed fuse patterns. high-performance electrically erasable programmable logic device atmel atf22lv10c see separate datasheet for atmel atf22lv10c(q)z option 0780m?pld?7/10
2 0780m?pld?7/10 atmel atf22lv10c figure 1-1. block diagram figure 1-2. pin configurations pin configurations (all pinouts top view) pin name function clk clock in logic inputs i/o bi-directional buffers vcc (3v to 5.5v) supply pd programmable power-down figure 1-3. tssop figure 1-4. dip/soic figure 1-5. plcc note: for plcc, pins 1, 8, 15, and 22 can be left unconnected. for superior performance, connect vcc to pin 1 and gnd to 8, 15, and 22 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 clk/in in in in/pd in in in in in in in gnd vcc i/o i/o i/o i/o i/o i/o i/o i/o i/o i/o in 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 clk/in in in in/pd in in in in in in in gnd vcc i/o i/o i/o i/o i/o i/o i/o i/o i/o i/o in 5 6 7 8 9 10 11 25 24 23 22 21 20 19 in/pd in in gnd* in in in i/o i/o i/o gnd* i/o i/o i/o 4 3 2 1 28 27 26 12 13 14 15 16 17 18 in in gnd gnd* in i/o i/o in in clk/in vcc* vcc i/o i/o
3 0780m?pld?7/10 atmel atf22lv10c 2. absolute maximum ratings* 3. dc and ac operating conditions 3.1 dc characteristics notes: 1. not more than one output at a time should be shorted. duration of short circuit test should not exceed 30 sec 2. for dc characteristics, the test condition of v cc = max corresponds to 3.6v temperature under bias .................. -40c to +85c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indi- cated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: 1. minimum voltage is -0.6v dc, which may undershoot to - 2.0v for pulses of less than 20ns. maximum output pin volt- age is v cc + 0.75v dc, which may overshoot to 7.0v for pulses of less than 20ns. storage temperature...................... -65c to +150c voltage on any pin with respect to ground...........................-2.0v to +7.0v (1) voltage on input pins with respect to ground during programming......................-2.0v to +14.0v (1) programming voltage with respect to ground.........................-2.0v to +14.0v (1) commercial industrial operating temperature (ambient) 0c - 70c -40c - 85c v cc power supply 3.0v - 5.5v 3.0v - 5.5v symbol parameter condition (2) min typ max units i il input or i/o low leakage current 0 ?? v in ?? v il (max) -10 a i ih input or i/o high leakage current (v cc - 0.2)v ?? v in ?? v cc 10 a i cc power supply current v cc = max, v in = max outputs open com. ind. 55 60 85 90 ma ma i cc2 clocked power supply current v cc = max outputs open , f = 15mhz com. ind. 100 105 ma ma i pd power supply current, power-down mode v cc = 3.6v, max v in = 0, outputs open com. ind. 10 10 100 120 a a i os (1) output short circuit current v out = 0.5v -130 ma v il input low voltage -0.5 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in =v ih or v il v cc = min i ol = 16ma 0.5 v v oh output high voltage v in =v ih or v il v cc = min i oh = -2.0ma 2.4 v v oh output high voltage i oh = -100a v cc - 0.2v v
4 0780m?pld?7/10 atmel atf22lv10c 3.2 ac waveforms 3.3 ac characteristics(1) note: 1. see ordering information for valid part numbers symbol parameter -10 -15 units min max min max t pd input or feedback to non-registered output 3 10 3 15 ns t cf clock to feedback 5 8ns t co clock to output 2 6.5 2 10 ns t s input or feedback setup time 7.5 12 ns t h input hold time 0 0 ns t p clock period 12 16 ns t w clock width 6 8 ns f max external feedback 1/(t s +t co ) 71.4 45.5 mhz internal feedback 1/(t s +t cf )80 50 mhz no feedback 1/(t p ) 83.3 62.5 mhz t ea input to output enable 3 12 3 15 ns t er input to output disable 2 12 2 15 ns t ap input or i/o to asynchronous reset of register 3 13 3 15 ns t sp setup time, synchronous preset 10 10 ns t aw asychronous reset width 8 8 ns t ar asychronous reset recovery time 6 6 ns t spr synchronous preset to clock recovery time 10 10 ns
5 0780m?pld?7/10 atmel atf22lv10c 3.4 power-down ac characteristics 3.5 input test waveforms and measurement levels t r ,t f < 1.5ns 3.6 output test loads note: similar competitors devices are specified with slightly different loads. these load differences may affect output signals? delay and slew rate. atmel ? devices are tested with sufficient margins to meet compatible device specification conditions. table 3-1. pin capacitance (f = 1mhz , t = 25c (1) note: 1. typical values for nominal supply voltage. this parameter is only sampled and is not 100% tested symbol parameter -10 -15 units min max min max t ivdh valid input before pd high 10 15 ns t gvdh valid oe before pd high 0 0 ns t cvdh valid clock before pd high 0 0 ns t dhix input don't care after pd high 10 15 ns t dhgx oe don't care after pd high 10 15 ns t dhcx clock don't care after pd high 10 15 ns t dliv pd low to valid input 10 15 ns t dlgv pd low to valid oe 25 30 ns t dlcv pd low to valid clock 25 30 ns t dlov pd low to valid output 30 35 ns typ max units conditions c in 5 8 pf v in =0v c out 6 8 pf v out =0v output pin 3.3v cl = 35 pf r1 = 316 r2 = 348
6 0780m?pld?7/10 atmel atf22lv10c 3.7 power-up reset the registers in the atmel ? atf22lv10c are designed to reset during power-up. at a point delayed slightly from v cc crossing v rst , all registers will be reset to the low state. the output state will depend on the polarity of the buffer. this feature is critical for state machine initialization. however, due to the asynchronous nature of reset and the uncertainty of how v cc actually rises in the system, the following conditions are required: 1. the v cc rise must be monotonic and start below 0.7v 2. the clock must remain stable during t pr 3. after t pr , all input and feedback setup times must be met before driving the clock pin high 3.8 preload of register outputs the atf22lv10c registers are provided with circuitry to allow loading of each register with either a high or a low. this feature will simplify testing since any state can be forced into the registers to control test sequencing. a jedec file with preload is generated when a source file with vectors is compiled. once downloaded, the jedec file preload sequence will be done automatically by most of the approved programmers after the programming. 4. electronic signature word there are 64-bits of programmable memory that are always available to the user, even if the device is secured. these bits can be used for user-specific data. 5. security fuse usage a single fuse is provided to prevent unauthorized copying of the atf22lv10c fuse patterns. once programmed, fuse verify and preload are inhibited. however, the 64-bit user signature remains accessible. the security fuse should be programmed last, as its effect is immediate. 6. programming/erasing programming/erasing is performed using standard pld programmers. see cmos pld programming hardware & software support for information on software/programming. table 6-1. programming/erasing 7. input and i/o pin-keeper all atf22v10c family members have internal input and i/o pin-keeper circuits. therefore, whenever inputs or i/os are not being driven externally, they will maintain their last driven state. this ensures that all logic array inputs and device outputs are at known states. these are relatively weak active circuits that can be easily overridden by ttl-compatible drivers (see input and i/o diagrams on page 7 ). parameter description typ max units t pr power-up reset time 600 1,000 ns v rst power-up reset voltage 2.5 3.0 v
7 0780m?pld?7/10 atmel atf22lv10c 8. power-down mode the atmel ? atf22lv10c includes an optional pin controlled power-down feature. when this mode is enabled, the pd pin acts as the power-down pin (pin 4 on the dip/soic packages and pin 5 on the plcc package). when the pd pin is high, the device supply current is reduced to less than 100ma. during power-down, all output data and internal logic states are latched and held. therefore, all registered and combinatorial output data remain valid. any outputs which were in an undetermined state at the onset of power-down will remain at the same state. during power-down, all input signals except the power-down pin are blocked. input and i/o hold latches remain active to insure that pins do not float to indeterminate levels, further reducing system power. the power-down pin feature is enabled in the logic design file. designs using the power-down pin may not use the pd pin logic array input. however, all other pd pin macrocell resources may still be used, including the buried feedback and foldback product term array inputs. pd pin configuration is controlled by the design file, and appears as a separate fuse bit in the jedec file. when the power-down feature is not specified in the design file, the in/pd pin will be configured as a regular logic input. note: some programmers list the 22v10 jedec-compatible 22v10c (no pd used) separately from the non-22v10 jedec- compatible 22v10cex (with pd used). figure 8-1. input diagram figure 8-2. i/o diagram esd protection circuit v cc input 100k v cc 100k input oe data v cc i/o
8 0780m?pld?7/10 atmel atf22lv10c 9. compiler mode selection table 9-1. compiler mode selection note: 1. these device types will create a jedec file which when programmed in an atmel atf22v10c device will enable the power-down mode feature. all other devices have this feature disabled. 10. functional logic diagram description the functional logic diagram describes the atmel ? atf22lv10c architecture. the atf22lv10c has twelve inputs and ten i/o macrocells. each macrocell can be configured into one of four output configurations: active high/low, registered/combinatorial output.the universal architecture of the atf22lv10c can be programmed to emulate most 24-pin pal devices. unused product terms are automatically disabled by the compiler to decrease power consumption. a security fuse, when programmed, protects the contents of the atf22lv10c. eight bytes (64-fuses) of user signature are accessible to the user for purposes such as storing project name, part number, revision or date. the user signature is accessible regardless of the state of the security fuse. pal mode (5828 fuses) gal mode (5892 fuses) power-down mode (1) (5893 fuses) synario atmel atf22c10c (dip) atmel atf22v10c (plcc) atmel atf22c10c dio (ues) atmel atf22v10c plcc (ues) atmel atf22c10c dip (pwd) atmel atf22c10v plcc (pwd) wincupl p22v10 p22v10lcc g22v10 g22v10lcc g22v10cp g22v10cplcc
9 0780m?pld?7/10 atmel atf22lv10c figure 10-1. functional logic diagram atmel atf22lv10c note: 1. *input not available if the power-down (pd) option is utilized
10 0780m?pld?7/10 atmel atf22lv10c 0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 3.00 3.30 3.60 supply voltage (v) atmel atf22lv10c supply current vs. supply voltage (t a = 25c) icc (ma) 0.80 0.90 1.00 1.10 -40.00 0.00 25.00 75.00 temperature (deg. c) atmel atf22lv10c normalized i cc vs. temp. normalized icc 0.00 25.00 50.00 75.00 0.00 10.00 20.00 50.00 frequency (mhz) atmel atf22lv10c supply current vs. input frequency (v cc = 3.3v, t a = 25c) icc (ma) -10.00 -8.00 -6.00 -4.00 -2.00 0.00 3.00 3.15 3.30 3.45 3.60 supply voltage (v) atmel atf22lv10c output source current vs. supply voltage (v oh = 2.4v) ioh (ma) -12.00 -10.00 -8.00 -6.00 -4.00 -2.00 0.00 2.00 2.20 2.40 2.60 2.70 2.80 3.00 3.20 3.30 v oh (v) atmel atf22lv10c output source current vs. output voltage (v cc = 3.3v, t a = 25c) ioh (ma) 32.00 33.00 34.00 35.00 36.00 37.00 38.00 39.00 40.00 3.00 3.15 3.30 3.45 3.60 supply voltage (v) atmel atf22lv10c output sink current vs. supply voltage (v ol = 0.5v) iol (ma) 0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.30 output voltage (v) atmel atf22lv10c output sink current vs. output voltage (v cc = 3.3v, t a = 25c) iol (ma)
11 0780m?pld?7/10 atmel atf22lv10c -100.00 -80.00 -60.00 -40.00 -20.00 0.00 20.00 0.00 -0.20 -0.40 -0.60 -0.80 -1.00 input voltage (v) atmel atf22lv10c input clamp current vs. input voltage (v cc = 3.3v, t a = 25c) input current (ma) -5.00 0.00 5.00 10.00 15.00 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 input voltage (v) atmel atf22lv10c input current vs. input voltage (v cc = 3.3v, t a = 25c) input current (a) 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 3.00 3.15 3.30 3.45 3.60 supply voltage (v) normalized t pd vs. v cc normalized tpd 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 -0.40 0.00 25.00 75.00 temperature (c) normalized t pd vs. temp normalized tpd 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 3.00 3.15 3.30 3.45 3.60 supply voltage (v) normalized t co vs. v cc normalized tco 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 -0.40 0.00 25.00 75.00 temperature (c) normalized t co vs. temp normalized tco 0.80 0.85 0.90 0.95 1.00 1.05 1.10 3.00 3.15 3.30 3.45 3.60 supply voltage (v) normalized t su vs. v cc normalized tsu 0.80 0.85 0.90 0.95 1.00 1.05 1.10 -0.40 0.00 25.00 75.00 temperature (c) normalized t su vs. temp normalized tsu
12 0780m?pld?7/10 atmel atf22lv10c -4.00 -2.00 0.00 2.00 4.00 6.00 8.00 10.00 12.00 14.00 0.00 50.00 100.00 150.00 200.00 250.00 300.00 output loading (pf) atmel atf22lv10c delta t pd vs. output loading delta tpd (ns) -4.00 -2.00 0.00 2.00 4.00 6.00 8.00 10.00 12.00 14.00 0.00 50.00 100.00 150.00 200.00 250.00 300.00 output loading (pf) atmel atf22lv10c delta t co vs. output loading delta tco (ns) -0.50 -0.40 -0.30 -0.20 -0.10 0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 9.00 10.00 number of outputs switching atmel atf22lv10c delta t pd vs. number of output switching delta tpd (ns) -0.50 -0.40 -0.30 -0.20 -0.10 0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 9.00 10.00 number of outputs switching atmel atf22lv10c delta t co vs. number of output switching delta tco (ns)
13 0780m?pld?7/10 atmel atf22lv10c 11. ordering information 11.1 ordering code detail note: lead based packages will become obsolete, and are not recommended for new designs 11.2 green package options (pb/halide-free/rohs compliant) 11.3 using ?c? product for industrial to use commercial product for industrial temperature ranges, simply de-rate i cc by 15% on the ?c? device. no speed de-rating is necessary. t pd (ns) t s (ns) t co (ns) ordering code package operation range 10 7.5 7.5 atf22lv10c-10jc atf22lv10c-10pc atf22lv10c-10sc atf22lv10c-10xc 28j 24p3 24s 24x commercial (0 ? cto70 ? c) 10 7.5 7.5 atf22lv10c-10ji atf22lv10c-10pi atf22lv10c-10si atf22lv10c-10xi 28j 24p3 24s 24x industrial (0 ? cto85 ? c) 15 12 10 atf22lv10c-15jc ATF22LV10C-15PC atf22lv10c-15sc atf22lv10c-15xc 28j 24p3 24s 24x commercial (0 ? cto70 ? c) 12 10 atf22lv10c-15ji atf22lv10c-15pi atf22lv10c-15si atf22lv10c-15xi 28j 24p3 24s 24x industrial (-40 ? cto+85 ? c) t pd (ns) t s (ns) t co (ns) ordering code package operation range 10 7.5 7.5 atf22lv10c-10ju atf22lv10c-10pu atf22lv10c-10su atf22lv10c-10xu 28j 24p3 24s 24x industrial (0 ? cto+85 ? c) package type 28j 28-lead, plastic j-leaded chip carrier (plcc) 24p3 24-lead, 0.300" wide, plastic dual in-line package (pdip) 24s 24-lead, 0.300" wide, plastic gull wing small outline (soic) 24x 24-lead, 4.4mm wide, plastic thin shrink small outline (tssop)
14 0780m?pld?7/10 atmel atf22lv10c 12. package information 12.1 28j ? plcc title drawing no. rev. package drawing contact: packagedrawings@atmel.com b 28j , 28-lead, plastic j-leaded chip carrier (plcc) 28j 10/04/01 1.14(0.045) x 45 pin no. 1 identifier 1.14(0.045) x 45 0.51(0.020)max 0.318(0.0125) 0.191(0.0075) a2 45 max (3x) a a1 b1 d2/e2 b e e1 e d1 d common dimensions (unit of measure = mm) symbol min nom max note notes: 1. this package conforms to jedec reference ms-018, variation ab. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is .010"(0.254mm) per side. dimension d1 and e1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. lead coplanarity is 0.004" (0.102mm) maximum. a 4.191 ? 4.572 a1 2.286 ? 3.048 a2 0.508 ? ? d 12.319 ? 12.573 d1 11.430 ? 11.582 note 2 e 12.319 ? 12.573 e1 11.430 ? 11.582 note 2 d2/e2 9.906 ? 10.922 b 0.660 ? 0.813 b1 0.330 ? 0.533 e 1.270 typ
15 0780m?pld?7/10 atmel atf22lv10c 12.2 24p3 ? pdip title drawing no. rev. 24p3 , 24-lead (0.300"/7.62mm wide) plastic dual inline package (pdip) d 24p3 6/1/04 pin 1 e1 a1 b e b1 c l seating plane a d e eb ec common dimensions (unit of measure = mm) symbol min nom max note a ? ? 5.334 a1 0.381 ? ? d 31.623 ? 32.131 note 2 e 7.620 ? 8.255 e1 6.096 ? 7.112 note 2 b 0.356 ? 0.559 b1 1.270 ? 1.651 l 2.921 ? 3.810 c 0.203 ? 0.356 eb ? ? 10.922 ec 0.000 ? 1.524 e 2.540 typ notes: 1. this package conforms to jedec reference ms-001, variation af. 2. dimensions d and e1 do not include mold flash or protrusion. mold flash or protrusion shall not exceed 0.25mm (0.010"). package drawing contact: packagedrawings@atmel.com
16 0780m?pld?7/10 atmel atf22lv10c 12.3 24s ? soic 08 pin1id pin 1 06/17/2002 title drawing no. rev. 24s , 24-lead (0.300" body) plastic gull wing small outline (soic) b 24s common dimensions (unit of measure = mm) symbol min nom max note a ? ? 2.65 a1 0.10 ? 0.30 d 10.00 ? 10.65 d1 7.40 ? 7.60 e 15.20 ? 15.60 b 0.33 ? 0.51 l 0.40 ? 1.27 l1 0.23 ? 0.32 e 1.27 bsc b d d1 e e a a1 l1 l package drawing contact: packagedrawings@atmel.com
17 0780m?pld?7/10 atmel atf22lv10c 12.4 24x ? tssop 0.30(0.012) 0.19(0.007) 4.48(0.176) 4.30(0.169) 6.50(0.256) 6.25(0.246) 0.65(0.0256)bsc 7.90(0.311) 7.70(0.303) 0.15(0.006) 0.05(0.002) 0.20(0.008) 0.09(0.004) 0.75(0.030) 0.45(0.018) 08 1.20(0.047)max dimensions in millimeter and (inches)* jedec standard mo-153 ad controlling dimension: millimeters pin 1 04/11/2001 title drawing no. rev. 24x , 24-lead (4.4mm body width) plastic thin shrink small outline package (tssop) a 24x package drawing contact: packagedrawings@atmel.com
18 0780m?pld?7/10 atmel atf22lv10c 13. revision history doc. rev. date comments 0780m 07/2010 update the standby current parameters for powerdown mode from 100a to 120a. shade ordering package option table and add note, ?lead based packages will become obsolete and are not recommended for new designs.? 0780l 12/2005 add green package options
0780m?pld?7/10 headquarters international atmel corporation 2325 orchard parkway san jose, ca 95131 usa tel: (+1)(408) 441-0311 fax: (+1)(408) 487-2600 www.atmel.com atmel asia limited unit 01-5 & 16, 19/f bea tower, millennium city 5 418 kwun tong road kwun tong, kowloon hong kong tel: (+852) 2245-6100 fax: (+852) 2722-1369 atmel munich gmbh business campus parkring 4 d-85748 garching b. munich germany tel: (+49) 89-31970-0 fax: (+49) 89-3194621 atmel japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (+81) 3-3523-3551 fax: (+81) 3-3523-7581 product contact technical support pld@atmel.com sales contact www.atmel.com/contacts literature requests www.atmel.com/literature disclaimer: the information in this document is provided in connection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in atmel?s terms and condi- tions of sale located on atmel?s web site, atmel assumes no liability whatsoever and disclaims any express, implied or statutory warranty relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, punitive, special or inciden- tal damages (including, without limitation, damages for loss of profits, business interruption, or loss of information) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to s pecifications and product descriptions at any time without notice. atmel does not make any commitment to update the information contained herein. unless specifica lly provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel?s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. ? atmel corporation 2010 . all rights reserved. atmel ? , logo and combinations thereof, everywhere you are ? and others, are registered trademarks or trademarks of atmel corporation or its subsidiaries. other terms and product names may be trademarks of others.

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